Synchronous OEIC integrating receiver for optically reconfigurable gate arrays

Sánchez-Azqueta, C. (Universidad de Zaragoza) ; Goll, B. ; Celma, S. (Universidad de Zaragoza) ; Zimmermann, H.

Resumen: A monolithically integrated optoelectronic receiver with a low-capacitance on-chip pin photodiode is presented. The receiver is fabricated in a 0.35µm opto-CMOS process fed at 3.3V and due to the highly effective integrated pin photodiode it operates at µW. A regenerative latch acting as a sense amplifier leads in addition to a low electrical power consumption. At 400 Mbit/s, sensitivities of -26.0dBm and -25.5dBm are achieved, respectively, for ¿ = 635nm and ¿ = 675nm (BER =10-9) with an energy efficiency of 2 pJ/bit.

Idioma: Inglés

DOI: 10.3390/s16060761

Año: 2016

Publicado en: Sensors (Switzerland) 16, 6 (2016), 761
ISSN: 1424-8220

Factor impacto JCR: 2.677 (2016)

Categ. JCR: INSTRUMENTS & INSTRUMENTATION rank: 10 / 58 = 0.172 (2016) - Q1 - T1
Categ. JCR: CHEMISTRY, ANALYTICAL rank: 25 / 76 = 0.329 (2016) - Q2 - T1
Categ. JCR: ELECTROCHEMISTRY rank: 12 / 29 = 0.414 (2016) - Q2 - T2

Factor impacto SCIMAGO: 0.623 - Electrical and Electronic Engineering (Q1) - Analytical Chemistry (Q2) - Atomic and Molecular Physics, and Optics (Q2) - Medicine (miscellaneous) (Q2) - Instrumentation (Q2) - Biochemistry (Q3)

Financiación: info:eu-repo/grantAgreement/ES/MEC/CAS14-00326
Financiación: info:eu-repo/grantAgreement/ES/MINECO-FEDER/TEC2011-23211
Financiación: info:eu-repo/grantAgreement/ES/MINECO-FEDER/TEC2014-52840-R

Tipo y forma: Artículo (Versión definitiva)

Área (Departamento): Área Electrónica (Dpto. Ingeniería Electrón.Com.)