Resumen: This work presents a monolithically integrated synchronous optical receiver fabricated in a standard 0.35 mu m CMOS process. The receiver consists of a regenerative latch acting as a sense amplifier; two highly effective, low-capacitance pin photodiodes connected to its output nodes (one of them blocked to the light); and an adjustable reference current to compensate the dynamic offset created by the asymmetries between the parasitic capacitances of the photodiodes. For lambda = 635 nm, a sensitivity of -25.8 dBm, -26.0 dBm, and -28.4dBm is obtained, respectively, for 400 Mbit/s, 350 Mbit/s, and 250 Mbit/s (BER = 10(-9)). The power consumption is 670 mu W, which translates to an energy efficiency of 1.7 pJ/bit at 400 Mbit/s. Idioma: Inglés DOI: 10.1016/j.proeng.2016.11.348 Año: 2016 Publicado en: Procedia Engineering 168 (2016), 1291-1295 ISSN: 1877-7058 Financiación: info:eu-repo/grantAgreement/ES/MICINN-FEDER/TEC2011-23211 Financiación: info:eu-repo/grantAgreement/ES/MICINN/TEC2014-52840-R Tipo y forma: Article (Published version) Área (Departamento): Área Electrónica (Dpto. Ingeniería Electrón.Com.)
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