Cooperative CPU, GPU, and FPGA heterogeneous execution with EngineCL

Dávila Guzmán, M.A. (Universidad de Zaragoza) ; Nozal, R. ; Gran Tejero, R. (Universidad de Zaragoza) ; Villarroya-Gaudó, M. (Universidad de Zaragoza) ; Suárez Gracia, D. (Universidad de Zaragoza) ; Bosque, J.L.

Resumen: Heterogeneous systems are the core architecture of most of the high-performance computing nodes, due to their excellent performance and energy efficiency. However, a key challenge that remains is programmability, specifically, releasing the programmer from the burden of managing data and devices with different architectures. To this end, we extend EngineCL to support FPGA devices. Based on OpenCL, EngineCL is a high-level framework providing load balancing among devices. Our proposal fully integrates FPGAs into the framework, enabling effective cooperation between CPU, GPU, and FPGA. With command overlapping and judicious data management, our work improves performance by up to 96% compared with single-device execution and delivers energy-delay gains of up to 37%. In addition, adopting FPGAs does not require programmers to make big changes in their applications because the extensions do not modify the user-facing interface of EngineCL.

Idioma: Inglés

DOI: 10.1007/s11227-019-02768-y

Año: 2019

Publicado en: Journal of Supercomputing 75, 3 (2019), 1732-1746
ISSN: 0920-8542

Factor impacto JCR: 2.469 (2019)

Categ. JCR: COMPUTER SCIENCE, HARDWARE & ARCHITECTURE rank: 24 / 53 = 0.453 (2019) - Q2 - T2
Categ. JCR: ENGINEERING, ELECTRICAL & ELECTRONIC rank: 123 / 266 = 0.462 (2019) - Q2 - T2
Categ. JCR: COMPUTER SCIENCE, THEORY & METHODS rank: 31 / 108 = 0.287 (2019) - Q2 - T1

Factor impacto SCIMAGO: 0.432 - Hardware and Architecture (Q2) - Information Systems (Q2) - Software (Q2) - Theoretical Computer Science (Q3)

Financiación: info:eu-repo/grantAgreement/ES/DGA/T48
Financiación: info:eu-repo/grantAgreement/EC/H2020/687698/EU/High Performance and Embedded Architecture and Compilation/HiPEAC
Financiación: info:eu-repo/grantAgreement/ES/MEC/FPU16-03299
Financiación: info:eu-repo/grantAgreement/ES/MINECO/TIN2016-76635-C2
Financiación: info:eu-repo/grantAgreement/ES/MINECO/TIN2016-81840-REDT
Financiación: info:eu-repo/grantAgreement/ES/UZ/JIUZ-2017-TEC-09

Tipo y forma: Article (PostPrint)

Área (Departamento): Área Arquit.Tecnología Comput. (Dpto. Informát.Ingenie.Sistms.)