<?xml version="1.0" encoding="UTF-8"?>
<references>
<reference>
  <a1>Alcolea Moreno, A.</a1>
  <a2>Olivito, J.</a2>
  <a2>Resano, J.</a2>
  <a2>Mecha, H.</a2>
  <t1>Analysis of a Pipelined Architecture for Sparse DNNs on Embedded Systems</t1>
  <t2>IEEE trans. very large scale integr. (VLSI) syst.</t2>
  <sn/>
  <op/>
  <vo/>
  <ab/>
  <la>eng</la>
  <k1/>
  <pb/>
  <pp/>
  <yr>2020</yr>
  <ed/>
  <ul>http://zaguan.unizar.es/record/106589/files/texto_completo.pdf;
	http://zaguan.unizar.es/record/106589/files/texto_completo.jpg?subformat=icon;
	</ul>
  <no>Imported from Invenio.</no>
</reference>

</references>