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<dc:dc xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:invenio="http://invenio-software.org/elements/1.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/oai_dc/ http://www.openarchives.org/OAI/2.0/oai_dc.xsd"><dc:identifier>doi:10.1109/ECCTD49232.2020.9218334</dc:identifier><dc:language>eng</dc:language><dc:creator>Martinez-Perez, A.D.</dc:creator><dc:creator>Martinez-Martinez, P.A.</dc:creator><dc:creator>Royo, G.</dc:creator><dc:creator>Aznar, F.</dc:creator><dc:creator>Celma, S.</dc:creator><dc:title>A New Approach to the Design of CMOS Inductorless Common-gate Low-noise Amplifiers</dc:title><dc:identifier>ART-2020-121294</dc:identifier><dc:description>This work proposes a new approach to design a simple and effective LNA reaching very competitive results in 1.2V 65-nm standard CMOS technology. The proposed design uses a transconductance enhancement technique to achieve 2.3 dB of noise figure at the 5 GHz band. The paper exposes the advantages of a reduced number of devices in the circuit and analyses the topology. Simulations with complete technology models and statistical analysis are presented for more precise results.</dc:description><dc:date>2020</dc:date><dc:source>http://zaguan.unizar.es/record/108320</dc:source><dc:doi>10.1109/ECCTD49232.2020.9218334</dc:doi><dc:identifier>http://zaguan.unizar.es/record/108320</dc:identifier><dc:identifier>oai:zaguan.unizar.es:108320</dc:identifier><dc:relation>info:eu-repo/grantAgreement/ES/MINECO-FEDER/TEC2014-52840-R</dc:relation><dc:relation>info:eu-repo/grantAgreement/ES/MINECO-FEDER/TEC2017-85867-R</dc:relation><dc:identifier.citation>IEEE ... International New Circuits and Systems Conference 20052866 (2020), [4 pp]</dc:identifier.citation><dc:rights>All rights reserved</dc:rights><dc:rights>http://www.europeana.eu/rights/rr-f/</dc:rights><dc:rights>info:eu-repo/semantics/openAccess</dc:rights></dc:dc>

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