000108384 001__ 108384
000108384 005__ 20230519145430.0
000108384 0247_ $$2doi$$a10.1109/ACCESS.2021.3086698
000108384 0248_ $$2sideral$$a124973
000108384 037__ $$aART-2021-124973
000108384 041__ $$aeng
000108384 100__ $$aRubio-Anguiano, L.E.
000108384 245__ $$aMaximizing utilization and minimizing migration in thermal-aware energy-efficient real-time multiprocessor scheduling
000108384 260__ $$c2021
000108384 5060_ $$aAccess copy available to the general public$$fUnrestricted
000108384 5203_ $$aThis work proposes CAlECs, a clustered scheduling system for MPSoCs subject to thermal and energy constraints. It calculates off-line a cyclic executive honoring temporal and thermal constraints, for a hard real-time (HRT) task set at minimum frequency to reduce consumed energy, minimizing context switches and migrations. It also provides an on-line controller able to manage system and task parametric variations and soft real-time (SRT) tasks, always meeting the HRT task set constraints and the system thermal bound. CAlECS maximizes CPU utilization to help avoid overprovisioning contributing to a low SWaP factor. Its modular design allows the utilization of different modeling and scheduling approaches, and makes the off-line and on-line components independent from each other to better suit the requirements of a specific system. We experimentally show that the cyclic executive provided by CAlECS for HRT task sets outperforms RUN, a reference off-line algorithm in terms of optimal number of context switches.
000108384 536__ $$9info:eu-repo/grantAgreement/ES/AEI/PID2019-105660RB-C21-AEI-10.13039-501100011033$$9info:eu-repo/grantAgreement/ES/DGA-ESF/T58-20R
000108384 540__ $$9info:eu-repo/semantics/openAccess$$aby-nc-nd$$uhttp://creativecommons.org/licenses/by-nc-nd/3.0/es/
000108384 590__ $$a3.476$$b2021
000108384 592__ $$a0.927$$b2021
000108384 594__ $$a6.7$$b2021
000108384 591__ $$aCOMPUTER SCIENCE, INFORMATION SYSTEMS$$b79 / 164 = 0.482$$c2021$$dQ2$$eT2
000108384 591__ $$aTELECOMMUNICATIONS$$b43 / 93 = 0.462$$c2021$$dQ2$$eT2
000108384 591__ $$aENGINEERING, ELECTRICAL & ELECTRONIC$$b105 / 277 = 0.379$$c2021$$dQ2$$eT2
000108384 593__ $$aComputer Science (miscellaneous)$$c2021$$dQ1
000108384 593__ $$aEngineering (miscellaneous)$$c2021$$dQ1
000108384 655_4 $$ainfo:eu-repo/semantics/article$$vinfo:eu-repo/semantics/publishedVersion
000108384 700__ $$aChils Trabanco, A.
000108384 700__ $$0(orcid)0000-0001-5940-9837$$aBriz Velasco, J.L.$$uUniversidad de Zaragoza
000108384 700__ $$aRamírez-Trevino, A.
000108384 7102_ $$15007$$2035$$aUniversidad de Zaragoza$$bDpto. Informát.Ingenie.Sistms.$$cÁrea Arquit.Tecnología Comput.
000108384 773__ $$g9 (2021), 83309-83328$$pIEEE Access$$tIEEE Access$$x2169-3536
000108384 8564_ $$s3627003$$uhttps://zaguan.unizar.es/record/108384/files/texto_completo.pdf$$yVersión publicada
000108384 8564_ $$s2679628$$uhttps://zaguan.unizar.es/record/108384/files/texto_completo.jpg?subformat=icon$$xicon$$yVersión publicada
000108384 909CO $$ooai:zaguan.unizar.es:108384$$particulos$$pdriver
000108384 951__ $$a2023-05-18-14:17:42
000108384 980__ $$aARTICLE