109408 20230519145429.0 doi 10.1109/TC.2021.3115056 sideral 125530 ART-2021-125530 eng Dávila-Guzmán, María Angélica Universidad de Zaragoza (orcid)0000-0003-0668-6229 Analytical Model for Memory-Centric High Level Synthesis-Generated Applications 2021 Access copy available to the general public Unrestricted High performance computing (HPC) demands huge memory bandwidth and computing resources to achieve maximum performance and energy efficiency. FPGAs can provide both, and with the help of High Level Synthesis, those HPC applications can be easily written in high level languages. However, the optimization process remains time-consuming, especially when based on trial-and-error bitstream generation. Model-based performance prediction is a practical and fast approach for kernel optimization, specially if done with information from pre-synthesis reports. This article presents an analytical model focused on memory intensive applications that captures the memory behavior and accurately predicts the kernel execution time within seconds rather than hours, as bitstream generation requires. The model has been validated with two DRAM technologies: DDR4 and HBM2, with a set of microbenchmarks and high performance computing applications showing an average error of 11% for DDR4 and 10% for HBM2. Compared with previous studies, our predictions at least halve the estimation error. info:eu-repo/grantAgreement/ES/AEI/PID2019-105660RB-C21-AEI-10.13039-501100011033 info:eu-repo/grantAgreement/ES/DGA-ESF/T58-20R info:eu-repo/grantAgreement/ES/MINECO-AEI-ERDF/PID2019-105660RB-C21 info:eu-repo/semantics/openAccess All rights reserved http://www.europeana.eu/rights/rr-f/ 3.183 2021 ENGINEERING, ELECTRICAL & ELECTRONIC 114 / 277 = 0.412 2021 Q2 T2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE 21 / 55 = 0.382 2021 Q2 T2 1.04 2021 Computational Theory and Mathematics 2021 Q1 Software 2021 Q1 Hardware and Architecture 2021 Q1 5.9 2021 info:eu-repo/semantics/article info:eu-repo/semantics/acceptedVersion Gran Tejero, Rubén Universidad de Zaragoza (orcid)0000-0002-4031-5651 Villarroya-Gaudó, María Universidad de Zaragoza (orcid)0000-0003-3000-0506 Suárez Gracia, Darío Universidad de Zaragoza (orcid)0000-0002-7490-4067 5007 035 Universidad de Zaragoza Dpto. Informát.Ingenie.Sistms. Área Arquit.Tecnología Comput. 70, 12 (2021), 2056-2069 IEEE trans. comput. IEEE TRANSACTIONS ON COMPUTERS 0018-9340 1284179 http://zaguan.unizar.es/record/109408/files/texto_completo.pdf Postprint 3214270 http://zaguan.unizar.es/record/109408/files/texto_completo.jpg?subformat=icon icon Postprint oai:zaguan.unizar.es:109408 articulos driver 2023-05-18-14:16:08 ARTICLE