Resumen: FPGAs are an excellent platform to implement computer vision applications, since these applications tend to offer a high level of parallelism with many data-independent operations. However, the freedom in the solution design space of FPGAs represents a problem because each solution must be individually designed, verified, and tuned. The emergence of High Level Synthesis (HLS) helps solving this problem and has allowed the implementation of open programming standards as OpenVX for computer vision applications on FPGAs, such as the HiF1ipVX library developed exclusively for Xilinx devices. Although with the HiF1ipVX library, designers can develop solutions efficiently on Xilinx, they do not have an approach to port and run their code on FPGAs from other manufacturers. This work extends the HiFlipVX capabilities in two significant ways: supporting Intel FPGA devices and enabling execution on discrete FPGA accelerators. To provide both without affecting user-facing code, the new carried out implementation combines two HLS programming models: C++, using Intel''s system of tasks, and OpenCL, which provides the CPU interoperability. Comparing with pure OpenCL implementations, this work reduces kernel dispatch resources, saving up to 24% of ALUT resources for each kernel in a graph, and improves performance 2.6 x and energy consumption 1.6 x on average for a set of representative applications, compared with state-of-the-art frameworks. Idioma: Inglés DOI: 10.1016/j.sysarc.2021.102372 Año: 2022 Publicado en: Journal of Systems Architecture 123 (2022), 102372 [10 pp.] ISSN: 1383-7621 Factor impacto JCR: 4.5 (2022) Categ. JCR: COMPUTER SCIENCE, SOFTWARE ENGINEERING rank: 22 / 108 = 0.204 (2022) - Q1 - T1 Categ. JCR: COMPUTER SCIENCE, HARDWARE & ARCHITECTURE rank: 11 / 54 = 0.204 (2022) - Q1 - T1 Factor impacto CITESCORE: 8.5 - Computer Science (Q1)