000112382 001__ 112382 000112382 005__ 20220511140725.0 000112382 0247_ $$2doi$$a10.1007/s11227-020-03397-6 000112382 0248_ $$2sideral$$a119970 000112382 037__ $$aART-2020-119970 000112382 041__ $$aeng 000112382 100__ $$aSoria-Pardos, V. 000112382 245__ $$aOn the use of many-core Marvell ThunderX2 processor for HPC workloads 000112382 260__ $$c2020 000112382 5060_ $$aAccess copy available to the general public$$fUnrestricted 000112382 5203_ $$aMarvell’s ThunderX2 has been the first Arm-based processor with deployments in large-scale HPC production systems, challenging the dominance that x86 processors had in the last decades. While x86 processors and its software stack have been characterized in detail, the behavior of Arm counterparts is not well known, limiting its adoption. This work methodically characterizes performance and power efficiency of the ThunderX2 running different HPC workloads compiled with two state-of-the-art compilers, GCC and Arm HPC Compiler. We study the maturity of available compilers and find that the Arm HPC Compiler is able to apply additional optimizations, resulting in better performance than GCC. In addition, we also compare both performance and power with respect to an Intel Skylake processor. Despite the faster single thread performance of Skylake, ThunderX2 is able to match performance on multi-threaded workloads due to its superior memory bandwidth. However, power efficiency of ThunderX2 is far from matching Skylake-based processors when AVX512 extensions are used. 000112382 540__ $$9info:eu-repo/semantics/openAccess$$aAll rights reserved$$uhttp://www.europeana.eu/rights/rr-f/ 000112382 590__ $$a2.474$$b2020 000112382 591__ $$aCOMPUTER SCIENCE, HARDWARE & ARCHITECTURE$$b26 / 53 = 0.491$$c2020$$dQ2$$eT2 000112382 591__ $$aCOMPUTER SCIENCE, THEORY & METHODS$$b33 / 110 = 0.3$$c2020$$dQ2$$eT1 000112382 591__ $$aENGINEERING, ELECTRICAL & ELECTRONIC$$b139 / 273 = 0.509$$c2020$$dQ3$$eT2 000112382 592__ $$a0.445$$b2020 000112382 593__ $$aHardware and Architecture$$c2020$$dQ2 000112382 593__ $$aSoftware$$c2020$$dQ2 000112382 593__ $$aInformation Systems$$c2020$$dQ2 000112382 655_4 $$ainfo:eu-repo/semantics/article$$vinfo:eu-repo/semantics/acceptedVersion 000112382 700__ $$aArmejach, A. 000112382 700__ $$0(orcid)0000-0002-7490-4067$$aSuárez, D.$$uUniversidad de Zaragoza 000112382 700__ $$aMoretó, M. 000112382 7102_ $$15007$$2035$$aUniversidad de Zaragoza$$bDpto. Informát.Ingenie.Sistms.$$cÁrea Arquit.Tecnología Comput. 000112382 773__ $$g77 (2020), 3315–3338$$pJ. supercomput.$$tJournal of Supercomputing$$x0920-8542 000112382 8564_ $$s424567$$uhttps://zaguan.unizar.es/record/112382/files/texto_completo.pdf$$yPostprint 000112382 8564_ $$s1166731$$uhttps://zaguan.unizar.es/record/112382/files/texto_completo.jpg?subformat=icon$$xicon$$yPostprint 000112382 909CO $$ooai:zaguan.unizar.es:112382$$particulos$$pdriver 000112382 951__ $$a2022-05-11-12:46:53 000112382 980__ $$aARTICLE