000126814 001__ 126814
000126814 005__ 20241125101142.0
000126814 0247_ $$2doi$$a10.3390/electronics12132862
000126814 0248_ $$2sideral$$a134230
000126814 037__ $$aART-2023-134230
000126814 041__ $$aeng
000126814 100__ $$aEsteban Eraso, Uxua$$uUniversidad de Zaragoza
000126814 245__ $$aA 19.5 Ghz 5-bit digitally programmable phase shifter for active antenna arrays
000126814 260__ $$c2023
000126814 5060_ $$aAccess copy available to the general public$$fUnrestricted
000126814 5203_ $$aThis paper presents the design of a new phase shifter to be used in a receiver of active antenna array operating in the range from 17 GHz to 22 GHz. Beamforming is achieved by controlling the phase of the signal in each radiant element. In this context, the phase shift is obtained by the combination of a quadrature signal generator (QSG) and a variable gain amplifier (VGA). This work is focused on the design of a VGA which has a set of dummy transistors to keep the input and output impedance constant. The phase shifter is digitally programmable using a 5-bit word. The system was laid out using a 65 nm CMOS process, and the physical post-layout results show that the phase shifter achieves root mean square errors of 4.5° for the phase and 0.79 dB for the gain at a frequency of 19.5 GHz. A comparative analysis with other recently published phase shifters shows that the proposed phase shifter presents a good compromise between power consumption and accuracy.
000126814 536__ $$9info:eu-repo/grantAgreement/ES/AEI/PID2020-114110RA-I00$$9info:eu-repo/grantAgreement/ES/DGA/LMP106-21$$9info:eu-repo/grantAgreement/ES/MICINN/RTC2019-007039-7
000126814 540__ $$9info:eu-repo/semantics/openAccess$$aby$$uhttp://creativecommons.org/licenses/by/3.0/es/
000126814 590__ $$a2.6$$b2023
000126814 592__ $$a0.644$$b2023
000126814 591__ $$aCOMPUTER SCIENCE, INFORMATION SYSTEMS$$b115 / 250 = 0.46$$c2023$$dQ2$$eT2
000126814 591__ $$aPHYSICS, APPLIED$$b81 / 179 = 0.453$$c2023$$dQ2$$eT2
000126814 591__ $$aENGINEERING, ELECTRICAL & ELECTRONIC$$b157 / 353 = 0.445$$c2023$$dQ2$$eT2
000126814 593__ $$aElectrical and Electronic Engineering$$c2023$$dQ2
000126814 593__ $$aComputer Networks and Communications$$c2023$$dQ2
000126814 593__ $$aSignal Processing$$c2023$$dQ2
000126814 593__ $$aHardware and Architecture$$c2023$$dQ2
000126814 593__ $$aControl and Systems Engineering$$c2023$$dQ2
000126814 594__ $$a5.3$$b2023
000126814 655_4 $$ainfo:eu-repo/semantics/article$$vinfo:eu-repo/semantics/publishedVersion
000126814 700__ $$0(orcid)0000-0002-8236-825X$$aSánchez-Azqueta, Carlos$$uUniversidad de Zaragoza
000126814 700__ $$0(orcid)0000-0003-2874-6368$$aAldea, Concepción$$uUniversidad de Zaragoza
000126814 700__ $$0(orcid)0000-0003-0182-7723$$aCelma, Santiago$$uUniversidad de Zaragoza
000126814 7102_ $$12002$$2385$$aUniversidad de Zaragoza$$bDpto. Física Aplicada$$cÁrea Física Aplicada
000126814 7102_ $$15008$$2250$$aUniversidad de Zaragoza$$bDpto. Ingeniería Electrón.Com.$$cÁrea Electrónica
000126814 773__ $$g12, 13 (2023), 2862 [10 pp.]$$pElectronics (Basel)$$tElectronics$$x2079-9292
000126814 8564_ $$s3458047$$uhttps://zaguan.unizar.es/record/126814/files/texto_completo.pdf$$yVersión publicada
000126814 8564_ $$s2765946$$uhttps://zaguan.unizar.es/record/126814/files/texto_completo.jpg?subformat=icon$$xicon$$yVersión publicada
000126814 909CO $$ooai:zaguan.unizar.es:126814$$particulos$$pdriver
000126814 951__ $$a2024-11-22-12:03:06
000126814 980__ $$aARTICLE