000127950 001__ 127950
000127950 005__ 20241125101145.0
000127950 0247_ $$2doi$$a10.3390/electronics12153251
000127950 0248_ $$2sideral$$a135078
000127950 037__ $$aART-2023-135078
000127950 041__ $$aeng
000127950 100__ $$0(orcid)0000-0002-1990-1656$$aParedes-Páliz, Diego F.$$uUniversidad de Zaragoza
000127950 245__ $$aCMOS linear laser driver for intermediate frequency over fiber (IFoF) links
000127950 260__ $$c2023
000127950 5060_ $$aAccess copy available to the general public$$fUnrestricted
000127950 5203_ $$aThe main objective of the proposed linear laser driver (LLD) is to reduce signal distortion in an analog direct modulation laser configuration used for intermediate frequency over fiber links. This work draws on an open-loop configuration featuring two differential pair blocks in a cascade arrangement to achieve a bandwidth measurement of 415 MHz at the half-power point, a total harmonic distortion of 4.57% for a fundamental frequency of 100 MHz, and an amplitude of 100 mVpp. The LLD provides a gain of 12.3 dB for a differential output and an output impedance of 46 Ω. The design, layout, and integration correspond to the process design kit for TSMC 65-nm CMOS technology. Experimental results show the advantage over other previously reported laser drivers.
000127950 536__ $$9info:eu-repo/grantAgreement/ES/AEI/PID2020-114110RA-I00$$9info:eu-repo/grantAgreement/ES/DGA/LMP106-21$$9info:eu-repo/grantAgreement/ES/MICINN/RTC2019-007039-7
000127950 540__ $$9info:eu-repo/semantics/openAccess$$aby$$uhttp://creativecommons.org/licenses/by/3.0/es/
000127950 590__ $$a2.6$$b2023
000127950 592__ $$a0.644$$b2023
000127950 591__ $$aCOMPUTER SCIENCE, INFORMATION SYSTEMS$$b115 / 250 = 0.46$$c2023$$dQ2$$eT2
000127950 591__ $$aPHYSICS, APPLIED$$b81 / 179 = 0.453$$c2023$$dQ2$$eT2
000127950 591__ $$aENGINEERING, ELECTRICAL & ELECTRONIC$$b157 / 353 = 0.445$$c2023$$dQ2$$eT2
000127950 593__ $$aElectrical and Electronic Engineering$$c2023$$dQ2
000127950 593__ $$aComputer Networks and Communications$$c2023$$dQ2
000127950 593__ $$aSignal Processing$$c2023$$dQ2
000127950 593__ $$aHardware and Architecture$$c2023$$dQ2
000127950 593__ $$aControl and Systems Engineering$$c2023$$dQ2
000127950 594__ $$a5.3$$b2023
000127950 655_4 $$ainfo:eu-repo/semantics/article$$vinfo:eu-repo/semantics/publishedVersion
000127950 700__ $$0(orcid)0000-0001-5402-1251$$aMartinez-Perez, Antonio D.$$uUniversidad de Zaragoza
000127950 700__ $$0(orcid)0000-0003-3629-0540$$aAznar, Francisco$$uUniversidad de Zaragoza
000127950 700__ $$0(orcid)0000-0003-0182-7723$$aCelma, Santiago$$uUniversidad de Zaragoza
000127950 7102_ $$15008$$2250$$aUniversidad de Zaragoza$$bDpto. Ingeniería Electrón.Com.$$cÁrea Electrónica
000127950 773__ $$g12, 15 (2023), 3251 [12 pp]$$pElectronics (Basel)$$tElectronics$$x2079-9292
000127950 8564_ $$s3782160$$uhttps://zaguan.unizar.es/record/127950/files/texto_completo.pdf$$yVersión publicada
000127950 8564_ $$s2620353$$uhttps://zaguan.unizar.es/record/127950/files/texto_completo.jpg?subformat=icon$$xicon$$yVersión publicada
000127950 909CO $$ooai:zaguan.unizar.es:127950$$particulos$$pdriver
000127950 951__ $$a2024-11-22-12:04:03
000127950 980__ $$aARTICLE