000133289 001__ 133289
000133289 005__ 20240410085329.0
000133289 0248_ $$2sideral$$a134855
000133289 037__ $$aART-2022-134855
000133289 041__ $$aeng
000133289 100__ $$0(orcid)0000-0001-7764-235X$$aArtal Sevil, Jesús Sergio$$uUniversidad de Zaragoza
000133289 245__ $$aAnalysis and Implementation of different non-isolated Partial-Power Processing Architectures based on the Cuk Converter
000133289 260__ $$c2022
000133289 5203_ $$aThis paper presents the analysis and study of different partial-power processing architectures based on the Cuk converter. Thus, the non-isolated topologies analyzed have been considered operative as voltage source converter (VSC). Likewise, the study of the converters is based on the continuous conduction mode (CCM). The partial-power topology has some advantages, such as high power density, small size, the decreased voltage in semiconductor devices, etc., this is because the DC-DC converter only processes a fraction of the total power. The purpose has been to compare the different topologies, Full-Power, Partial-Power, and hybrid-converters, in order to observe the advantages and drawbacks in each case. Among the parameters to be studied is the voltage stress in semiconductors as well as the voltage gain in each architecture. The effectiveness of these new converter architectures has been validated by the Matlab/Simulink software simulation. In this way, different simulation results are presented and analyzed throughout the paper. The purpose of this paper has been to study and explore the usefulness of the non-isolated Cuk converter with partial-power processing architecture for industrial power applications.
000133289 536__ $$9info:eu-repo/grantAgreement/ES/DGA/T28_20R$$9info:eu-repo/grantAgreement/ES/MINECO/RTC-2015-3358-5$$9info:eu-repo/grantAgreement/ES/UZ/OTRI-2020-0416
000133289 540__ $$9info:eu-repo/semantics/openAccess$$aAll rights reserved$$uhttp://www.europeana.eu/rights/rr-f/
000133289 655_4 $$ainfo:eu-repo/semantics/article$$vinfo:eu-repo/semantics/acceptedVersion
000133289 700__ $$aAnzola, Jon
000133289 700__ $$0(orcid)0000-0002-3652-5605$$aBallestín Bernad, Víctor$$uUniversidad de Zaragoza
000133289 700__ $$0(orcid)0000-0003-2813-1240$$aBernal Agustín, José Luis$$uUniversidad de Zaragoza
000133289 7102_ $$15009$$2535$$aUniversidad de Zaragoza$$bDpto. Ingeniería Eléctrica$$cÁrea Ingeniería Eléctrica
000133289 773__ $$g2022, 24 (2022), 1-10$$pEur. Conf. Power Electron. Appl.$$tEuropean Conference on Power Electronics and Applications$$x2325-0313
000133289 85641 $$uhttps://ieeexplore.ieee.org/document/9907506/authors#authors$$zTexto completo de la revista
000133289 8564_ $$s1376361$$uhttps://zaguan.unizar.es/record/133289/files/texto_completo.pdf$$yPostprint
000133289 8564_ $$s2563939$$uhttps://zaguan.unizar.es/record/133289/files/texto_completo.jpg?subformat=icon$$xicon$$yPostprint
000133289 909CO $$ooai:zaguan.unizar.es:133289$$particulos$$pdriver
000133289 951__ $$a2024-04-10-08:38:50
000133289 980__ $$aARTICLE