000147902 001__ 147902
000147902 005__ 20250109162738.0
000147902 0247_ $$2doi$$a10.3390/s24237747
000147902 0248_ $$2sideral$$a141415
000147902 037__ $$aART-2024-141415
000147902 041__ $$aeng
000147902 100__ $$0(orcid)0000-0003-0365-6702$$aAparicio-Téllez, Raúl$$uUniversidad de Zaragoza
000147902 245__ $$aA Study of the Optimal Logic Combinations of RO-Based PUFs on FPGAs to Maximize Identifiability
000147902 260__ $$c2024
000147902 5060_ $$aAccess copy available to the general public$$fUnrestricted
000147902 5203_ $$aOne of the challenges that wireless sensor networks (WSNs) need to address is achieving security and privacy while keeping low power consumption at sensor nodes. Physically unclonable functions (PUFs) offer a challenge–response functionality that leverages the inherent variations in the manufacturing process of a device, making them an optimal solution for sensor node authentication in WSNs. Thus, identifiability is the fundamental property of any PUF. Consequently, it is necessary to design structures that optimize the PUF in terms of identifiability. This work studies different architectures of oscillators to analyze which ones exhibit the best properties to construct a RO-based PUF. For this purpose, Generalized Galois Ring Oscillators (GenGAROs) are used. A GenGARO is a novel type of oscillator formed by a combination of up to two input logical operations connected in cascade, where one input is the output of the previous operation and the other is the feedback signal. GenGAROs include some previously proposed oscillators as well as many new oscillator designs. Thus, the architecture of GenGAROs is analyzed to implement a GenGARO-PUF on an Artix-FPGA. With this purpose, an exhaustive study of logical operation combinations that optimize PUF performance in terms of identifiability has been conducted. From this, it has been observed that certain logic gates in specific positions within the oscillator contribute to constructing a PUF with good properties, and by applying certain constraints, any oscillator generated with these constraints can be used to construct a PUF with an equal error rate on the order of or below 10−11 using 100-bit responses. As a result, a design methodology for FPGA-based RO-PUFs has been developed, enabling the generation of multiple PUF primitives with high identifiability that other designers could exploit to implement RO-based PUFs with good properties.
000147902 536__ $$9info:eu-repo/grantAgreement/ES/AEI/PID2020-114110RA-I00$$9info:eu-repo/grantAgreement/ES/AEI/PID2023-150244OB-I00
000147902 540__ $$9info:eu-repo/semantics/openAccess$$aby$$uhttp://creativecommons.org/licenses/by/3.0/es/
000147902 655_4 $$ainfo:eu-repo/semantics/article$$vinfo:eu-repo/semantics/publishedVersion
000147902 700__ $$0(orcid)0000-0001-8648-6248$$aGarcia-Bosque, Miguel$$uUniversidad de Zaragoza
000147902 700__ $$0(orcid)0000-0001-9131-0861$$aDíez-Señorans, Guillermo$$uUniversidad de Zaragoza
000147902 700__ $$0(orcid)0000-0003-3629-0540$$aAznar, Francisco$$uUniversidad de Zaragoza
000147902 700__ $$0(orcid)0000-0003-0182-7723$$aCelma, Santiago$$uUniversidad de Zaragoza
000147902 7102_ $$15008$$2250$$aUniversidad de Zaragoza$$bDpto. Ingeniería Electrón.Com.$$cÁrea Electrónica
000147902 773__ $$g24, 23 (2024), 7747 [14 pp.]$$pSensors$$tSensors$$x1424-8220
000147902 8564_ $$s1042796$$uhttps://zaguan.unizar.es/record/147902/files/texto_completo.pdf$$yVersión publicada
000147902 8564_ $$s2667656$$uhttps://zaguan.unizar.es/record/147902/files/texto_completo.jpg?subformat=icon$$xicon$$yVersión publicada
000147902 909CO $$ooai:zaguan.unizar.es:147902$$particulos$$pdriver
000147902 951__ $$a2025-01-09-14:41:32
000147902 980__ $$aARTICLE