69450 20210121114507.0 doi 10.1016/j.micpro.2015.01.001 sideral 89763 ART-2015-89763 eng (orcid)0000-0002-7752-8714 Olivito, J. Performance and energy efficiency analysis of a Reversi player for FPGAs and General Purpose Processors 2015 Access copy available to the general public Unrestricted Board-game applications are frequently found in mobile devices where the computing performance and the energy budget are constrained. Since the Artificial Intelligence techniques applied in these games are computationally intensive, the applications developed for mobile systems are frequently simplistic, far from the level of equivalent applications developed for desktop computers. Currently board games are software applications executed on General Purpose Processors. However, they exhibit a medium degree of parallelism and a custom hardware accelerator implemented on an FPGA can take advantage of that. We have selected the well-known Reversi game as a case study because it is a very popular board game with simple rules but huge computational demands. We developed and optimized software and hardware designs for this game that apply the same classical Artificial Intelligence techniques. The applications have been executed on different representative platforms and the results demonstrate that the FPGAs implementations provide better performance, lower power consumption and, therefore, impressive energy savings. These results demonstrate that FPGAs can efficiently deal with this kind of problems. info:eu-repo/grantAgreement/ES/DGA/T48 info:eu-repo/grantAgreement/ES/MICINN/TIN2010-21291-C02-01 info:eu-repo/grantAgreement/ES/MINECO/CSD2007-00050 info:eu-repo/semantics/openAccess All rights reserved http://www.europeana.eu/rights/rr-f/ 0.471 2015 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE 44 / 51 = 0.863 2015 Q4 T3 ENGINEERING, ELECTRICAL & ELECTRONIC 215 / 257 = 0.837 2015 Q4 T3 COMPUTER SCIENCE, THEORY & METHODS 97 / 105 = 0.924 2015 Q4 T3 0.25 2015 Artificial Intelligence 2015 Q3 Software 2015 Q3 Hardware and Architecture 2015 Q3 Computer Networks and Communications 2015 Q3 info:eu-repo/semantics/article info:eu-repo/semantics/submittedVersion (orcid)0000-0002-4031-5651 Gran, R. Universidad de Zaragoza (orcid)0000-0002-7532-2720 Resano, J. Universidad de Zaragoza González, C. (orcid)0000-0001-8093-8346 Torres, E. Universidad de Zaragoza 5007 035 Universidad de Zaragoza Dpto. Informát.Ingenie.Sistms. Área Arquit.Tecnología Comput. 39, 2 (2015), 64-73 Microprocess. microsyst. MICROPROCESSORS AND MICROSYSTEMS 0141-9331 696767 http://zaguan.unizar.es/record/69450/files/texto_completo.pdf Preprint 91392 http://zaguan.unizar.es/record/69450/files/texto_completo.jpg?subformat=icon icon Preprint oai:zaguan.unizar.es:69450 articulos driver 2021-01-21-10:55:00 ARTICLE