77196 20200117221627.0 doi 10.3390/electronics7120423 sideral 110463 ART-2018-110463 eng Martinez-Nieto, J.A. High-Linearity Self-Biased CMOS Current Buffer 2018 Access copy available to the general public Unrestricted A highly linear fully self-biased class AB current buffer designed in a standard 0.18 mu m CMOS process with 1.8 V power supply is presented in this paper. It is a simple structure that, with a static power consumption of 48 mu W, features an input resistance as low as 89 Omega, high accuracy in the input-output current ratio and total harmonic distortion (THD) figures lower than -60 dB at 30 mu A amplitude signal and 1 kHz frequency. Robustness was proved through Monte Carlo and corner simulations, and finally validated through experimental measurements, showing that the proposed configuration is a suitable choice for high performance low voltage low power applications. info:eu-repo/grantAgreement/ES/MINECO-FEDER/TEC2015-65750-R info:eu-repo/semantics/openAccess by http://creativecommons.org/licenses/by/3.0/es/ 1.764 2018 ENGINEERING, ELECTRICAL & ELECTRONIC 154 / 265 = 0.581 2018 Q3 T2 0.461 2018 Computer Networks and Communications 2018 Q1 Control and Systems Engineering 2018 Q1 Signal Processing 2018 Q1 Hardware and Architecture 2018 Q1 Electrical and Electronic Engineering 2018 Q1 info:eu-repo/semantics/article info:eu-repo/semantics/publishedVersion Sanz-Pascual, M.T. (orcid)0000-0002-5380-3013 Medrano-Marques, N. Universidad de Zaragoza (orcid)0000-0003-2361-1077 Calvo-Lopez, B. Universidad de Zaragoza Sarmiento-Reyes, A. 5008 250 Universidad de Zaragoza Dpto. Ingeniería Electrón.Com. Área Electrónica 7, 12 (2018), 423 [18 pp] Electronics ELECTRONICS 2079-9292 2258931 http://zaguan.unizar.es/record/77196/files/texto_completo.pdf Versión publicada 110883 http://zaguan.unizar.es/record/77196/files/texto_completo.jpg?subformat=icon icon Versión publicada oai:zaguan.unizar.es:77196 articulos driver 2020-01-17-21:57:48 ARTICLE