84168 20200716101512.0 doi 10.1109/TCSI.2018.2867918 sideral 110366 ART-2019-110366 eng Perez-Resa, A. Universidad de Zaragoza Chaotic Encryption for 10-Gb Ethernet Optical Links 2019 Access copy available to the general public Unrestricted In this paper, a new physical layer encryption method for optical 10-Gb Ethernet links is proposed. Necessary modifications to introduce encryption in Ethernet 10GBase-R standard have been considered. This security enhancement has consisted of a symmetric streaming encryption of the 64b/66b data flow at physical coding sublayer level thanks to two keystream generators based on a chaotic algorithm. The overall system has been implemented and tested in a field programmable gate array. Ethernet traffic has been encrypted, transmitted, and decrypted over a multimode optical link. Experimental results are analyzed concluding that it is possible to cipher traffic at this level and hide the complete Ethernet traffic pattern from any passive eavesdropper. In addition, no overhead is introduced during encryption, getting no losses in the total throughput. info:eu-repo/grantAgreement/ES/MEC/FPU14-03523 info:eu-repo/grantAgreement/ES/MINECO-FEDER/TEC2014-52840-R info:eu-repo/grantAgreement/ES/MINECO-FEDER/TEC2017-85867-R info:eu-repo/semantics/openAccess All rights reserved http://www.europeana.eu/rights/rr-f/ 3.318 2019 ENGINEERING, ELECTRICAL & ELECTRONIC 74 / 266 = 0.278 2019 Q2 T1 1.038 2019 Electrical and Electronic Engineering 2019 Q1 info:eu-repo/semantics/article info:eu-repo/semantics/acceptedVersion (orcid)0000-0001-8648-6248 Garcia-Bosque, M. Universidad de Zaragoza (orcid)0000-0002-8236-825X Sanchez-Azqueta, C. Universidad de Zaragoza (orcid)0000-0003-0182-7723 Celma, S. Universidad de Zaragoza 2002 385 Universidad de Zaragoza Dpto. Física Aplicada Área Física Aplicada 5008 X Universidad de Zaragoza Dpto. Ingeniería Electrón.Com. Proy. investigación JBA 5008 250 Universidad de Zaragoza Dpto. Ingeniería Electrón.Com. Área Electrónica 66, 2 (2019), 859-868 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS IEEE Transactions on Circuits and Systems I: Regular Papers 1549-8328 2604738 http://zaguan.unizar.es/record/84168/files/texto_completo.pdf Postprint 549657 http://zaguan.unizar.es/record/84168/files/texto_completo.jpg?subformat=icon icon Postprint oai:zaguan.unizar.es:84168 articulos driver 2020-07-16-09:19:35 ARTICLE