doi:10.1007/s11227-019-02768-yengDávila Guzmán, M.A.Nozal, R.Gran Tejero, R.Villarroya-Gaudó, M.Suárez Gracia, D.Bosque, J.L.Cooperative CPU, GPU, and FPGA heterogeneous execution with EngineCLART-2019-110690Heterogeneous systems are the core architecture of most of the high-performance computing nodes, due to their excellent performance and energy efficiency. However, a key challenge that remains is programmability, specifically, releasing the programmer from the burden of managing data and devices with different architectures. To this end, we extend EngineCL to support FPGA devices. Based on OpenCL, EngineCL is a high-level framework providing load balancing among devices. Our proposal fully integrates FPGAs into the framework, enabling effective cooperation between CPU, GPU, and FPGA. With command overlapping and judicious data management, our work improves performance by up to 96% compared with single-device execution and delivers energy-delay gains of up to 37%. In addition, adopting FPGAs does not require programmers to make big changes in their applications because the extensions do not modify the user-facing interface of EngineCL.2019http://zaguan.unizar.es/record/8847110.1007/s11227-019-02768-yhttp://zaguan.unizar.es/record/88471oai:zaguan.unizar.es:88471info:eu-repo/grantAgreement/ES/DGA/T48info:eu-repo/grantAgreement/EC/H2020/687698/EU/High Performance and Embedded Architecture and Compilation/HiPEACThis project has received funding from the European Union’s Horizon 2020 research and innovation program under grant agreement No H2020 687698-HiPEACinfo:eu-repo/grantAgreement/ES/MEC/FPU16-03299info:eu-repo/grantAgreement/ES/MINECO/TIN2016-76635-C2info:eu-repo/grantAgreement/ES/MINECO/TIN2016-81840-REDTinfo:eu-repo/grantAgreement/ES/UZ/JIUZ-2017-TEC-09Journal of Supercomputing 75, 3 (2019), 1732-1746All rights reservedhttp://www.europeana.eu/rights/rr-f/info:eu-repo/semantics/openAccess