88471 20221004075833.0 doi 10.1007/s11227-019-02768-y sideral 110690 ART-2019-110690 eng Dávila Guzmán, M.A. Universidad de Zaragoza (orcid)0000-0003-0668-6229 Cooperative CPU, GPU, and FPGA heterogeneous execution with EngineCL 2019 Access copy available to the general public Unrestricted Heterogeneous systems are the core architecture of most of the high-performance computing nodes, due to their excellent performance and energy efficiency. However, a key challenge that remains is programmability, specifically, releasing the programmer from the burden of managing data and devices with different architectures. To this end, we extend EngineCL to support FPGA devices. Based on OpenCL, EngineCL is a high-level framework providing load balancing among devices. Our proposal fully integrates FPGAs into the framework, enabling effective cooperation between CPU, GPU, and FPGA. With command overlapping and judicious data management, our work improves performance by up to 96% compared with single-device execution and delivers energy-delay gains of up to 37%. In addition, adopting FPGAs does not require programmers to make big changes in their applications because the extensions do not modify the user-facing interface of EngineCL. info:eu-repo/grantAgreement/ES/DGA/T48 info:eu-repo/grantAgreement/EC/H2020/687698/EU/High Performance and Embedded Architecture and Compilation/HiPEAC This project has received funding from the European Union’s Horizon 2020 research and innovation program under grant agreement No H2020 687698-HiPEAC info:eu-repo/grantAgreement/ES/MEC/FPU16-03299 info:eu-repo/grantAgreement/ES/MINECO/TIN2016-76635-C2 info:eu-repo/grantAgreement/ES/MINECO/TIN2016-81840-REDT info:eu-repo/grantAgreement/ES/UZ/JIUZ-2017-TEC-09 info:eu-repo/semantics/openAccess All rights reserved http://www.europeana.eu/rights/rr-f/ 2.469 2019 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE 24 / 53 = 0.453 2019 Q2 T2 ENGINEERING, ELECTRICAL & ELECTRONIC 123 / 266 = 0.462 2019 Q2 T2 COMPUTER SCIENCE, THEORY & METHODS 31 / 108 = 0.287 2019 Q2 T1 0.432 2019 Hardware and Architecture 2019 Q2 Information Systems 2019 Q2 Software 2019 Q2 Theoretical Computer Science 2019 Q3 info:eu-repo/semantics/article info:eu-repo/semantics/acceptedVersion Nozal, R. Gran Tejero, R. Universidad de Zaragoza (orcid)0000-0002-4031-5651 Villarroya-Gaudó, M. Universidad de Zaragoza (orcid)0000-0003-3000-0506 Suárez Gracia, D. Universidad de Zaragoza (orcid)0000-0002-7490-4067 Bosque, J.L. 5007 035 Universidad de Zaragoza Dpto. Informát.Ingenie.Sistms. Área Arquit.Tecnología Comput. 75, 3 (2019), 1732-1746 J. supercomput. Journal of Supercomputing 0920-8542 539162 http://zaguan.unizar.es/record/88471/files/texto_completo.pdf Postprint 246554 http://zaguan.unizar.es/record/88471/files/texto_completo.jpg?subformat=icon icon Postprint oai:zaguan.unizar.es:88471 articulos driver 2022-10-03-13:17:32 ARTICLE