000099722 001__ 99722 000099722 005__ 20230519145502.0 000099722 0247_ $$2doi$$a10.3390/electronics10030314 000099722 0248_ $$2sideral$$a123220 000099722 037__ $$aART-2021-123220 000099722 041__ $$aeng 000099722 100__ $$0(orcid)0000-0002-7057-4283$$aAlcolea, A.$$uUniversidad de Zaragoza 000099722 245__ $$aFPGA accelerator for gradient boosting decision trees 000099722 260__ $$c2021 000099722 5060_ $$aAccess copy available to the general public$$fUnrestricted 000099722 5203_ $$aA decision tree is a well-known machine learning technique. Recently their popularity has increased due to the powerful Gradient Boosting ensemble method that allows to gradually increasing accuracy at the cost of executing a large number of decision trees. In this paper we present an accelerator designed to optimize the execution of these trees while reducing the energy consumption. We have implemented it in an FPGA for embedded systems, and we have tested it with a relevant case-study: pixel classification of hyperspectral images. In our experiments with different images our accelerator can process the hyperspectral images at the same speed at which they are generated by the hyperspectral sensors. Compared to a high-performance processor running optimized software, on average our design is twice as fast and consumes 72 times less energy. Compared to an embedded processor, it is 30 times faster and consumes 23 times less energy. 000099722 536__ $$9info:eu-repo/grantAgreement/ES/AEI-FEDER/PID2019-105660RB-C21$$9info:eu-repo/grantAgreement/ES/AEI-FEDER/TIN2016-76635-C2-1-R$$9info:eu-repo/grantAgreement/ES/DGA-ESF/T58-20R$$9info:eu-repo/grantAgreement/ES/DGA-FEDER/Construyendo Europa desde Aragón 000099722 540__ $$9info:eu-repo/semantics/openAccess$$aby$$uhttp://creativecommons.org/licenses/by/3.0/es/ 000099722 590__ $$a2.69$$b2021 000099722 592__ $$a0.59$$b2021 000099722 594__ $$a3.7$$b2021 000099722 591__ $$aCOMPUTER SCIENCE, INFORMATION SYSTEMS$$b100 / 164 = 0.61$$c2021$$dQ3$$eT2 000099722 593__ $$aComputer Networks and Communications$$c2021$$dQ2 000099722 591__ $$aPHYSICS, APPLIED$$b82 / 161 = 0.509$$c2021$$dQ3$$eT2 000099722 593__ $$aSignal Processing$$c2021$$dQ2 000099722 591__ $$aENGINEERING, ELECTRICAL & ELECTRONIC$$b139 / 277 = 0.502$$c2021$$dQ3$$eT2 000099722 593__ $$aHardware and Architecture$$c2021$$dQ2 000099722 593__ $$aControl and Systems Engineering$$c2021$$dQ2 000099722 655_4 $$ainfo:eu-repo/semantics/article$$vinfo:eu-repo/semantics/publishedVersion 000099722 700__ $$0(orcid)0000-0002-7532-2720$$aResano, J.$$uUniversidad de Zaragoza 000099722 7102_ $$15007$$2035$$aUniversidad de Zaragoza$$bDpto. Informát.Ingenie.Sistms.$$cÁrea Arquit.Tecnología Comput. 000099722 773__ $$g10, 3 (2021), 314 [15 pp]$$pElectronics (Basel)$$tElectronics$$x2079-9292 000099722 8564_ $$s658179$$uhttps://zaguan.unizar.es/record/99722/files/texto_completo.pdf$$yVersión publicada 000099722 8564_ $$s2751463$$uhttps://zaguan.unizar.es/record/99722/files/texto_completo.jpg?subformat=icon$$xicon$$yVersión publicada 000099722 909CO $$ooai:zaguan.unizar.es:99722$$particulos$$pdriver 000099722 951__ $$a2023-05-18-15:00:38 000099722 980__ $$aARTICLE