A generic framework to integrate data caches in the WCET analysis of real-time systems

Segarra, Juan (Universidad de Zaragoza) ; Gran Tejero, Rubén (Universidad de Zaragoza) ; Viñals, Víctor (Universidad de Zaragoza)

Resumen: Worst-case execution time (WCET) analysis of systems with data caches is one of the key challenges in real-time systems. Caches exploit the inherent reuse properties of programs by temporarily storing certain memory contents near the processor, in order that further accesses to such contents do not require costly memory transfers. Current worst-case data cache analysis methods focus on specific cache organizations (set-associative LRU, locked, ACDC, etc.), most of the times adapting techniques designed to analyze instruction caches. On the other hand, there are methodologies to analyze the data reuse of a program, independently of the data cache. In this paper we propose a generic WCET analysis framework to analyze data caches taking profit of such reuse information. It includes the categorization of data references and their integration in an IPET model. We apply it to a conventional LRU cache, an ACDC, and other baseline systems, and compare them using the TACLeBench benchmark suite. Our results show that persistence-based LRU analyses dismiss essential information on data, and a reuse-based analysis improves the WCET bound around 17% in average. In general, the best WCET estimations are obtained with optimization level 2, where the ACDC cache performs 39% better than a set-associative LRU.

Idioma: Inglés

DOI: 10.1016/j.sysarc.2021.102304

Año: 2021

Publicado en: Journal of Systems Architecture 120 (2021), 102304 [15 pp.]
ISSN: 1383-7621

Factor impacto JCR: 5.836 (2021)

Categ. JCR: COMPUTER SCIENCE, SOFTWARE ENGINEERING rank: 12 / 110 = 0.109 (2021) - Q1 - T1
Categ. JCR: COMPUTER SCIENCE, HARDWARE & ARCHITECTURE rank: 8 / 55 = 0.145 (2021) - Q1 - T1

Factor impacto CITESCORE: 7.2 - Computer Science (Q1)

Factor impacto SCIMAGO: 1.283 - Software (Q1) - Hardware and Architecture (Q1)

Financiación: info:eu-repo/grantAgreement/ES/DGA-ESF/T58-20R
Financiación: info:eu-repo/grantAgreement/ES/MINECO-AEI-ERDF/PID2019-105660RB-C21

Tipo y forma: Article (Published version)

Área (Departamento): Área Arquit.Tecnología Comput. (Dpto. Informát.Ingenie.Sistms.)