Resumen: In this paper, an improved discrete-time potentiostat architecture is proposed. The focus is placed on the digital controller, aiming to enhance its performances, reduce measurement uncertainty and increase speed. The system is modeled including its non-linear behavior, and the impact of the digital controller parameters on the system response is analyzed through behavioral simulations. The developed mathematical model shows good agreement with the simulation results. The new controller successfully reduces the measurement uncertainty compared to a purely integral control system by up to a factor of 100 in the worst-case scenario. The system speed is also improved by approximately 40%. The new digital controller not only improves the overall performance of the system, but also does not increase significantly the hardware complexity of the system. Idioma: Inglés DOI: 10.1109/DCIS67520.2025.11281809 Año: 2025 Publicado en: Proceedings (Conference on Design of Circuits and Integrated Systems) (2025), 19-24 ISSN: 2471-6170 Financiación: info:eu-repo/grantAgreement/ES/MICINN/PID2022-140556OB-I00 Tipo y forma: Congress (Published version) Área (Departamento): Área Tecnología Electrónica (Dpto. Ingeniería Electrón.Com.)