Resumen: In this work, a novel Physically Unclonable Function (PUF) based on Generalized Galois Ring Oscillators (GenGAROs) optimized for IoT device identification purposes has been proposed and analyzed. A GenGARO is composed of a certain number of logic gates with up to two inputs connected in cascade so that one input corresponds to the output of the previous gate and the other to the output of the last one. The bias of the signal of these oscillators has been used to construct a GenGARO-PUF. Firstly, the combination of logic gates which optimize the response of the GenGARO-PUF in terms of identifiability has been studied. Once the optimal configuration of GenGARO has been found, a GenGARO-PUF of 11 Look-Up Tables (LUTs) has been implemented on FPGA and its properties have been analyzed and compared to a conventional RO-PUF implemented in the exact same locations of the FPGA and using the same hard constraints. The proposal of this work shows an average Inter- Hamming Distance (HD) of 49.9 % and an Equal Error Rate EER=1.52⋅10-12 using 100-bit responses. The GenGARO-PUF has proven to outperform the conventional Ring Oscillator (RO) PUF in terms of spatial autocorrelation, uniqueness, uniformity, bit-aliasing, identifiability and resistance to modeling attacks. Furthermore, a 3-LUT GenGARO-PUF has been proposed maintaining the prediction accuracy of the 11-LUT GenGARO-PUF, and showing that a good identifiability can still be achieved using fewer resources of the FPGA. Idioma: Inglés DOI: 10.1109/ACCESS.2025.3550677 Año: 2025 Publicado en: IEEE Access 13 (2025), 46147-46160 ISSN: 2169-3536 Financiación: info:eu-repo/grantAgreement/ES/AEI/PID2023-150244OB-I00 Financiación: info:eu-repo/grantAgreement/ES/MICIU/PDC2023-145838-I00 Tipo y forma: Artículo (Versión definitiva) Área (Departamento): Área Electrónica (Dpto. Ingeniería Electrón.Com.)